Psion patch for linux/include/ files This patch contains updates to the following files: ./include/asm-arm/arch-psionw/dma.h ./include/asm-arm/arch-psionw/hardware.h ./include/asm-arm/arch-psionw/ide.h ./include/asm-arm/arch-psionw/io.h ./include/asm-arm/arch-psionw/irq.h ./include/asm-arm/arch-psionw/irqs.h ./include/asm-arm/arch-psionw/keyboard.h ./include/asm-arm/arch-psionw/memory.h ./include/asm-arm/arch-psionw/param.h ./include/asm-arm/arch-psionw/psionw-power.h ./include/asm-arm/arch-psionw/system.h ./include/asm-arm/arch-psionw/time.h ./include/asm-arm/arch-psionw/timex.h ./include/asm-arm/arch-psionw/uncompress.h ./include/asm-arm/arch-psionw/vmalloc.h ./include/asm-arm/hardware/psionw.h ./include/linux/miscdevice.h ./include/linux/serial_core.h diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/dma.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/dma.h diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/dma.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/dma.h --- /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/dma.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.19-rmk2/include/asm-arm/arch-psionw/dma.h 2002-10-02 22:07:30.000000000 -0700 @@ -0,0 +1,28 @@ +/* + * linux/include/asm-arm/arch-psionw/dma.h + * + * Copyright (C) 1997,1998 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H + +#define MAX_DMA_ADDRESS 0xffffffff + +#define MAX_DMA_CHANNELS 0 + +#endif /* _ASM_ARCH_DMA_H */ diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/hardware.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/hardware.h diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/hardware.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/hardware.h --- /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/hardware.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.19-rmk2/include/asm-arm/arch-psionw/hardware.h 2002-10-02 22:07:30.000000000 -0700 @@ -0,0 +1,39 @@ +/* + * linux/include/asm-arm/arch-psionw/hardware.h + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +#include + +#define PSIONW_VIRT_BASE 0xdf000000 +#define PSIONW_BASE PSIONW_VIRT_BASE + +#define IO_BASE PSIONW_VIRT_BASE +#define PCIO_BASE IO_BASE + +#ifndef __ASSEMBLY__ +extern unsigned int psionw_read_rtc(void); +extern void psionw_write_rtc(unsigned int xrtc); +extern unsigned int psionw_read_rtc_alarm(void); +extern void psionw_write_rtc_alarm(unsigned int xrtc); +#endif + +#endif diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/ide.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/ide.h diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/ide.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/ide.h --- /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/ide.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.19-rmk2/include/asm-arm/arch-psionw/ide.h 2002-10-06 14:30:02.000000000 -0700 @@ -0,0 +1,77 @@ +/* + * linux/include/asm-arm/arch-psionw/ide.h + * + * Copyright (C) 2001 Tony Lindgren + * + * Contains code from the Psion 5 ETNA driver for linux, + * Copyright (C) 1999 Werner Almesberger. + * + * Some code based on the code from sa1100 ide.h + * Copyright (c) 1998 Hugo Fiennes & Nicolas Pitre + * + */ + +#include +#include +#include +#include +#include + +#include <../drivers/pcmcia/psion_etna.h> + +#if !defined(CONFIG_PSIONW_REVO) && !defined(CONFIG_PSIONW_REVOPLUS) + +//#define DISK_RECOVERY_TIME 500 +#define WAIT_DRQ (50*HZ/100) /* 50msec - spec allows up to 20ms */ +#define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */ +#define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */ +//#define CONFIG_BLK_DEV_IDEDMA 1 + +/* + * We need to override the default insw and outsw, as the ETNA + * chip does automatic word to half-word translation. For some + * weird reason the translation only seems to happen for IDE cards. + * See also etna_insw_direct() and etna_outsw_direct(). + */ +#define insw(p,d,l) etna_insw_ide(p,d,l) +#define outsw(p,d,l) etna_outsw_ide(p,d,l) + +static __inline__ void +ide_init_hwif_ports(hw_regs_t * hw, int data_port, int ctrl_port, int *irq) +{ + ide_ioreg_t reg; + int i; + int regincr = 1; + + /* + * The CF card is not powered up on 5mx Pro when + * booting without Epoc. Optionally this is not + * needed for 5mx, as ETNA is already powered. + * Also the cold init resets the Epoc CF config. + */ + etna_cold_init(); + + memset(hw, 0, sizeof (*hw)); + + reg = (ide_ioreg_t) data_port; + + for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) { + hw->io_ports[i] = reg; + reg += regincr; + } + + hw->io_ports[IDE_CONTROL_OFFSET] = (ide_ioreg_t) ctrl_port; +} + +static __inline__ void +ide_init_default_hwifs(void) +{ + hw_regs_t hw; + + /* init the interface */ + ide_init_hwif_ports(&hw, 0x1f0, 0x3f6, NULL); + hw.irq = IRQ_EINT1; + ide_register_hw(&hw, NULL); +} + +#endif /* End ifndef CONFIG_PSIONW_REVO */ diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/io.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/io.h diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/io.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/io.h --- /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/io.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.19-rmk2/include/asm-arm/arch-psionw/io.h 2002-10-06 14:29:10.000000000 -0700 @@ -0,0 +1,282 @@ +/* + * linux/include/asm-arm/arch-psionw/io.h + * + * Copyright (C) 1999 ARM Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include + +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +#define IO_SPACE_LIMIT 0xffffffff + +#ifdef __io +#undef __io +#endif + +#define __mem_pci(a) ((unsigned long)(a)) +#define __mem_isa(a) ((unsigned long)(a)) + +/* + * Generic virtual read/write + */ +#define __arch_getw(a) (*(volatile unsigned short *)(a)) +#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v)) + +#define etna_readb(p) (*(volatile u8 *)(ETNA_V_BASE + (p))) +#define etna_writeb(v,p) (*(volatile u8 *)(ETNA_V_BASE + (p)) = (v)) + +#define etna_readl(p) (*(volatile unsigned int *)(ETNA_V_BASE + (p))) + +/* + * Epoc boot EEPROM reading. Writing would be dangerous, as there is + * no known alternate boot method. + */ +#define psion_br_read(p) (*(volatile u8 *)(PSION_V_BR + (p))) + +/* + * Epoc boot flash reading. Writing would be dangerous, as there is + * no known alternate boot method. + */ +#define psion_bf_read(p) (*(volatile u8 *)(PSION_V_BF + (p))) + +#define DEBUG_MEM_BASE() ({ printk(" 0x%02x-0x%02x", (*(volatile u8 *)(CF1_V_BASE + CF_MEM_BASE + 0x2)), \ + (*(volatile u8 *)(CF1_V_BASE + CF_MEM_BASE + 0x7))); }) + +#define ETNA_GET_MEMBASE(p) (*(volatile u8 *)(CF1_V_BASE + CF_MEM_BASE + (p))) + +/* + * Reads the CompactFlash ready status. Defined at least for SanDisk cards. + * 0x1f7 clears the pending interrupt, while 0x3f6 does not. + */ +#define CF_GET_STAT() (*(volatile u8 *)(CF1_V_BASE + CF_IO8_BASE + 0x1f7)) +#define CF_GET_ALTSTAT() (*(volatile u8 *)(CF1_V_BASE + CF_IO8_BASE + 0x3f6)) +#define CF_CARD_BUSY_BIT (1 << 7) + +#define etna_mem_inb(p) ({ unsigned int __v =__raw_readb(CF1_V_BASE + CF_MEM_BASE + (p)); __v; }) + +#define etna_mem_outb(v,p) __raw_writeb(v, CF1_V_BASE + CF_MEM_BASE + (p)) + +/* + * Most CF cards need an extra delay before a 16-bit write. + * Otherwise we may get tons of ide status=0x58 errors and a + * corrupted disk. The delay time needed depends on the card + * and needs to be somewhere between 300 and 1500. + * + * The problem happens in the following way: + * + * 1. Ide driver issues a write command to the 8-bit command bus + * 2. CompactFlash card sets DRQ etc + * 3. Ide driver waits for not busy and checks for DRQ etc + * 4. Ide driver starts to write the data to the 16-bit bus + * 5. Ide driver checks for a successful write + * 6. CompactFlash card still expects more data, and gives status 0x58 + * 7. Ide driver produces an error, as it expects 0x50 but gets 0x58 + * + * So it looks like the Psion 32-bit to 16-bit translation bus is not + * ready to accept data, and the beginning of the write never makese it + * to the CompactFlash. + */ +static __inline__ void +etna_status_check(void) +{ + +#if 0 + psionw_writeb(psionw_readb(PBDDR) | 0x3, PBDDR); + psionw_writeb(psionw_readb(PBDR) & ~0x3, PBDR); + + psionw_writeb(psionw_readb(PBDDR) & ~0x3, PBDDR); + while ((psionw_readb(PBDR) & 0x3) != 0x3) { + printk("."); + udelay(1); + } + printk("o"); +#endif + udelay(1500); +} + + +/* Boundary alignment for ETNA CF access, not currently used */ +#define PCMCIA_IO16(a) (CF1_V_BASE + 0x0c000000 + ((a) & ~3) + (((a) & 2) << 24) ) + +#ifdef DEBUG_INSW +#define INSW_DEBUG(x...) printk(x) +#else +#define INSW_DEBUG(x...) do { ; } while(0) +#endif + +/* + * Translate a series of N x 16-bit reads into N x 32-bit reads + * + * Used for ide flash cards only. The automatic translation does not work for + * network cards, for example. See also etna_insw_direct. + */ +static __inline__ void +etna_insw_ide(unsigned int port, void *to, int len) +{ + int i; + + for (i = 0; i < len; i++) { + ((unsigned short *) to)[i] = (unsigned short) __raw_readl(CF1_V_BASE + CF_IO16_BASE + port); + //((unsigned short *) to)[i] = (unsigned short) (__raw_readl(PCMCIA_IO16(port)) & 0xffff); + } +} + +/* + * Translate a series of N x 16-bit reads into N/2 x 32-bit reads for ETNA. + * + * Used for non-ide cards. + */ +static __inline__ void +etna_insw_direct(unsigned int port, void *to, int len) +{ + int i, val = 0; + + INSW_DEBUG("\nI <--- Reading %d half words from port 0x%04x\n", len, port); + for (i = 0; i < len; i++) { + if (i & 0x1) { + val = __raw_readl(CF1_V_BASE + CF_IO16_BASE + port); + INSW_DEBUG(" +<-- 0x%08x\n", val); + ((unsigned short *) to)[i - 1] = (unsigned short) (val & 0xffff); + ((unsigned short *) to)[i] = (unsigned short) (val >> 16); + INSW_DEBUG(" +<-- flush to[%d] = 0x%04x to[%d] = 0x%04x\n", i - 1, + ((unsigned short *) to)[i - 1], i, + ((unsigned short *) to)[i]); + } + } + + if (len & 0x1) { + val = __raw_readl(CF1_V_BASE + CF_IO16_BASE + port); + ((unsigned short *) to)[len - 1] = (unsigned short) (val & 0xffff); + INSW_DEBUG(" +<-- flush to[%d] = 0x%04x\n", len - 1, + ((unsigned short *) to)[i - 1]); + } +} + + +#ifdef DEBUG_OUTSW +#define OUTSW_DEBUG(x...) printk(x) +#else +#define OUTSW_DEBUG(x...) do { ; } while(0) +#endif + +/* + * Capures selected IO port values for debugging + */ +static __inline__ void +psion_debug_regb(char *res, char* desc, unsigned int port, int range) +{ + int len, i; + + if (res == NULL) + return; + + len = strlen(res); + + if (len > 0) + res += len; + + sprintf(res, "%s 0x%08x: ", desc, port); + res += strlen(desc) + 13; + + for (i = 0; i < range; i++) { + sprintf(res, "0x%02x ", __raw_readb(port + i)); + res += 5; + } + //sprintf(res, "\n"); + *res = '\n'; + res++; + //sprintf(res, "\0"); + *res = '\0'; + res++; +} + + +/* + * Translate a series of N x 16-bit writes into N x 32-bit writes + * + * Used for ide flash cards only. The automatic translation does not work for + * network cards, for example. See also etna_outsw_direct. + */ +static __inline__ void +etna_outsw_ide(unsigned int port, const void *from, int len) +{ + int i; + + etna_status_check(); + + for (i = 0; i < len; i++) { + __raw_writel(((unsigned short *) from)[i], CF1_V_BASE + CF_IO16_BASE + port); + //__raw_writel(((unsigned short *) from)[i], PCMCIA_IO16(port)); + } +} + +/* + * Translate a series of N x 16-bit writes into N/2 x 32-bit writes for ETNA. + * + * Used for non-ide cards. + */ +static __inline__ void +etna_outsw_direct(unsigned int port, const void *from, int len) +{ + int i, val, prev = 0; + + OUTSW_DEBUG("\nO ---> Writing %d half words to port 0x%04x\n", len, port); + + for (i = 0; i < len; i++) { + val = (unsigned int) ( ((unsigned short *) from)[i] ); + + OUTSW_DEBUG(" +--> 0x%04x\n", val); + + if (i & 0x1) { + __raw_writel( ((val<<16) | prev), CF1_V_BASE+CF_IO16_BASE+port); + OUTSW_DEBUG(" +--> flush 0x%08x\n", ((val<<16) | prev)); + } + prev = val; + } + if (len & 0x1) { + __raw_writel( (val), CF1_V_BASE+CF_IO16_BASE+port); + OUTSW_DEBUG(" +--> flush 0x%08x\n", (val)); + } +} + +#define outb(v,p) __raw_writeb(v, CF1_V_BASE + CF_IO8_BASE + (p)) +#define outw(v,p) __raw_writel(v, CF1_V_BASE + CF_IO16_BASE + (p)) +#define outl(v,p) printk("Error: Unsupported outl called 0x%x\n", (p)) + +#define inb(p) ({ unsigned int __v =__raw_readb(CF1_V_BASE + CF_IO8_BASE + (p)); __v; }) +#define inw(p) ({ unsigned int __v =__raw_readl(CF1_V_BASE + CF_IO16_BASE + (p)) & 0xffff; __v; }) +#define inl(p) printk("Error: Unsupported inl called 0x%x\n", (p)) + +#define outsb(p,d,l) __raw_writesb(CF1_V_BASE + CF_IO8_BASE + p,d,l) +#define outsw(p,d,l) etna_outsw_direct(p,d,l) +#define outsl(p,d,l) printk("Error: Unsupported outsl called 0x%x\n", (p)) + +#define insb(p,d,l) __raw_readsb(CF1_V_BASE + CF_IO8_BASE + p,d,l) +#define insw(p,d,l) etna_insw_direct(p,d,l) +#define insl(p,d,l) printk("Error: Unsupported insl called 0x%x\n", (p)) + +/* + * ioremap support - validate a PCI memory address, and convert it + * to a physical address for the page tables. + */ +#define iomem_valid_addr(iomem,size) (1) +#define iomem_to_phys(iomem) (iomem) + +#endif diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/irq.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/irq.h diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/irq.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/irq.h --- /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/irq.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.19-rmk2/include/asm-arm/arch-psionw/irq.h 2002-10-02 22:07:30.000000000 -0700 @@ -0,0 +1,21 @@ +/* + * linux/include/asm-arm/arch-psionw/irq.h + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define fixup_irq(i) (i) diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/irqs.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/irqs.h diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/irqs.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/irqs.h --- /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/irqs.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.19-rmk2/include/asm-arm/arch-psionw/irqs.h 2002-10-02 22:07:30.000000000 -0700 @@ -0,0 +1,56 @@ +/* + * linux/include/asm-arm/arch-psionw/irqs.h + * + * Copyright (C) 2001 Tony Lindgren + * Copyright (C) 2001 Yuji Shinokawa + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +/* + * Interrupts from INTSR1 + */ +#define IRQ_EXTFIQ 0 /* External fiq (Nextfiq pin) */ +#define IRQ_BLINT 1 /* Battery low */ +#define IRQ_WEINT 2 /* Watch dog expired */ +#define IRQ_MCINT 3 /* Media changed */ +#define IRQ_CSINT 4 /* Sound codec */ +#define IRQ_EINT1 5 /* CF card, external 1 (Neint1 pin) */ +#define IRQ_EINT2 6 /* External 2 (Neint2 pin) */ +#define IRQ_EINT3 7 /* Touch panel, external 3 (Neint3 pin) */ +#define IRQ_TC1OI 8 /* TC1 under flow */ +#define IRQ_TC2OI 9 /* TC2 under flow */ +#define IRQ_RTCMI 10 /* RTC compare match */ +#define IRQ_TINT 11 /* 64Hz tick */ +#define IRQ_UART1 12 /* Uart1 */ +#define IRQ_UART2 13 /* Uart2 */ +#define IRQ_LCDINT 14 /* LCD */ +#define IRQ_SSEOTI 15 /* SSI */ + +/* + * Define the irqs in use, and the irqs that need custom handling with + * mask_ack_irq_int1 + */ +#define INT1_IRQS (0x0000ffff) +#define INT1_ACK_IRQS (0x00000f50) + +#define NR_IRQS 16 + +/* First four interrupts are FIQs */ +#define FIQ_START 0 + +/* This is needed by rtc.c */ +#undef RTC_IRQ +#define RTC_IRQ IRQ_RTCMI diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/keyboard.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/keyboard.h diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/keyboard.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/keyboard.h --- /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/keyboard.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.19-rmk2/include/asm-arm/arch-psionw/keyboard.h 2002-10-02 22:07:30.000000000 -0700 @@ -0,0 +1,43 @@ +/* + * linux/include/asm-arm/arch-psionw/keyboard.h + * + * Copyright (C) 1998 Russell King + * Copyright (C) 2001 Tony Lindgren + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define NR_KEYCODES 64 +#if NR_KEYCODES>0x80 +#error Out of bits for scancode +#endif + +#define SYSRQ_KEY 0x100 /* dummy */ + +extern int kbdpsion_translate(unsigned char scancode, unsigned char *keycode_p); +extern void kbdpsion_hw_init(void); +extern unsigned char kbdpsion_sysrq_xlate[NR_KEYCODES]; +extern void psion_arch_handler(unsigned char value, char up_flag); + +#define kbd_setkeycode(x...) (-EINVAL) +#define kbd_getkeycode(x...) (-EINVAL) +#define kbd_translate(sc,kc,rm) kbdpsion_translate(sc,kc) +#define kbd_unexpected_up(kc) (0x80) +#define kbd_enable_irq(x...) do { } while (0) +#define kbd_disable_irq(x...) do { } while (0) +#define kbd_leds(x...) do { } while (0) +#define kbd_init_hw() kbdpsion_hw_init() +#define kbd_sysrq_xlate ((sysrq_pressed = 0), kbdpsion_sysrq_xlate) +#define kbd_arch_handler psion_arch_handler diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/memory.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/memory.h diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/memory.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/memory.h --- /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/memory.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.19-rmk2/include/asm-arm/arch-psionw/memory.h 2002-10-06 14:29:09.000000000 -0700 @@ -0,0 +1,111 @@ +/* + * linux/include/asm-arm/arch-psionw/memory.h + * + * Copyright (C) 2001 Tony Lindgren + * + * Based on the sa1100 code, some portions of the code + * Copyright (c) 1999 Nicolas Pitre + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __ASM_ARCH_MMU_H +#define __ASM_ARCH_MMU_H + +/* + * Task size: 3GB + */ +#define TASK_SIZE (0xc0000000UL) +#define TASK_SIZE_26 (0x04000000UL) + +/* + * This decides where the kernel will search for a free chunk of vm + * space during mmap's. + */ +#define TASK_UNMAPPED_BASE (TASK_SIZE / 3) + +/* + * Page offset: 3GB + */ +#define PAGE_OFFSET (0xc0000000UL) +#define PHYS_OFFSET (0xc0000000UL) + +/* + * We take advantage of the fact that physical and virtual address can be the + * same. The NUMA code is handling the large holes that might exist between + * all memory banks. + */ +#define __virt_to_phys__is_a_macro +#define __phys_to_virt__is_a_macro +#define __virt_to_phys(x) (x) +#define __phys_to_virt(x) (x) + +/* + * Virtual view <-> DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + * + * On the PSIONW, bus addresses are equivalent to physical addresses. + * FIXME5MX: This may not be needed + */ +#define __virt_to_bus__is_a_macro +#define __bus_to_virt__is_a_macro +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + +#ifdef CONFIG_DISCONTIGMEM + +#define NR_NODES 4 +/* + * Currently defined in arch/arm/mm/mm-sa1100.c + */ + +#define NODE_MAX_MEM_SHIFT 27 +#define NODE_MAX_MEM_SIZE (1<> NODE_MAX_MEM_SHIFT) + +/* + * Given a page frame number, convert it to a node id. + */ +#define PFN_TO_NID(pfn) \ + (((pfn) - PHYS_PFN_OFFSET) >> (NODE_MAX_MEM_SHIFT - PAGE_SHIFT)) + +/* + * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory + * and returns the mem_map of that node. + */ +#define ADDR_TO_MAPBASE(kaddr) \ + NODE_MEM_MAP(KVADDR_TO_NID((unsigned long)(kaddr))) + +#define PFN_TO_MAPBASE(pfn) NODE_MEM_MAP(PFN_TO_NID(pfn)) + +/* + * Given a kaddr, LOCAL_MAR_NR finds the owning node of the memory + * and returns the index corresponding to the appropriate page in the + * node's mem_map. + */ +#define LOCAL_MAP_NR(addr) \ + (((unsigned long)(addr) & (NODE_MAX_MEM_SIZE - 1)) >> PAGE_SHIFT) + +#endif /* CONFIG_DISCONTIGMEM */ + +#endif diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/param.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/param.h diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/param.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/param.h --- /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/param.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.19-rmk2/include/asm-arm/arch-psionw/param.h 2002-10-02 22:07:30.000000000 -0700 @@ -0,0 +1,21 @@ +/* + * linux/include/asm-arm/arch-psionw/param.h + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define HZ 100 diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/psionw-power.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/psionw-power.h diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/psionw-power.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/psionw-power.h --- /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/psionw-power.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.19-rmk2/include/asm-arm/arch-psionw/psionw-power.h 2002-10-06 14:29:23.000000000 -0700 @@ -0,0 +1,24 @@ +/* + * linux/include/asm-arm/arch-psionw/psionw-power.h + */ +#include +#include +#include + +/* + * Starts the DC to DC converter + */ +static __inline__ +void start_pump(int lock) +{ + if (psionw_readl(PUMPCON) == PUMP_STOP_VAL) { + psionw_writel(PUMP_RUN_VAL, PUMPCON); + } + + if (!(psionw_readb(PDDR) & PDDR_PUMP_PWR1) || + !(psionw_readb(PDDR) & PDDR_PUMP_PWR2)) { + psionw_writeb(psionw_readb(PDDR) | PDDR_PUMP_PWR1, PDDR); + mdelay(30); + psionw_writeb(psionw_readb(PDDR) | PDDR_PUMP_PWR2, PDDR); + } +} diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/system.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/system.h diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/system.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/system.h --- /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/system.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.19-rmk2/include/asm-arm/arch-psionw/system.h 2002-10-06 14:31:13.000000000 -0700 @@ -0,0 +1,44 @@ +/* + * linux/include/asm-arm/arch-psionw/system.h + * + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include +#include +#include + +static void +arch_idle(void) +{ + psionw_writel(1, HALT); + __asm__ __volatile__(" + mov r0, r0 + mov r0, r0 + mov r0, r0 + "); +} + +static inline void arch_reset(char mode) +{ + cpu_reset(0); +} + +#endif diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/time.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/time.h diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/time.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/time.h --- /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/time.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.19-rmk2/include/asm-arm/arch-psionw/time.h 2002-10-06 14:31:14.000000000 -0700 @@ -0,0 +1,72 @@ +/* + * linux/include/asm-arm/arch-psionw/time.h + * + * Copyright (C) 2001 Tony Lindgren + * Copyright (C) 2001 Yuji Shinokawa + * + * Based on the clps711x code, some portions of the code + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * 2001/02/22 Modified for Psion 5MX by Tony Lindgren + * + * 15 Mar 2001 Yuji Shinokawa + * Added to call do_set_rtc() in psionw_timer_interrupt() to adjust RTC. + * Adjust xtime.tv_sec for CONFIG_ARCH_PSIONW. + */ + +#include +#include +#include + +#define RTC_PORT(x) (PSIONW_BASE + x) + +/* + * IRQ handler for the timer + */ +static void +psionw_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + do_leds(); + do_timer(regs); + do_set_rtc(); + do_profile(regs); +} + +/* + * Set up timer interrupt, and return the current time in seconds. + */ +extern __inline__ void +setup_timer(void) +{ + unsigned int timer = 0; + timer = psionw_readl(TC2CTRL); + timer |= TC_CLKSEL; /* 512kHz mode */ + timer |= TC_MODE; /* Periodic mode */ + timer |= TC_ENABLE; + psionw_writel(timer, TC2CTRL); + psionw_writel(5119, TC2LOAD); /* 512kHz / 100Hz - 1 */ + timer_irq.handler = psionw_timer_interrupt; + + /* + * Make irqs happen for the system timer + */ + setup_arm_irq(IRQ_TC2OI, &timer_irq); + + xtime.tv_sec = (psionw_readl(RTCDRU) << 16); + xtime.tv_sec |= (psionw_readl(RTCDRL) & 0xffff); +} + diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/timex.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/timex.h diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/timex.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/timex.h --- /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/timex.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.19-rmk2/include/asm-arm/arch-psionw/timex.h 2002-10-02 22:07:30.000000000 -0700 @@ -0,0 +1,22 @@ +/* + * linux/include/asm-arm/arch-psionw/timex.h + * + * Prospector 720T architecture timex specifications + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#define CLOCK_TICK_RATE 512000 diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/uncompress.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/uncompress.h diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/uncompress.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/uncompress.h --- /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/uncompress.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.19-rmk2/include/asm-arm/arch-psionw/uncompress.h 2002-10-02 22:07:30.000000000 -0700 @@ -0,0 +1,52 @@ +/* + * linux/include/asm-arm/arch-psionw/uncompress.h + * + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include + +#undef PSIONW_BASE +#define PSIONW_BASE PSIONW_PHYS_BASE + +#define __raw_readl(p) (*(unsigned long *)(p)) +#define __raw_writel(v,p) (*(unsigned long *)(p) = (v)) + +/* + * This does not append a newline + */ +static void +puts(const char *s) +{ + char c; + + while ((c = *s++) != '\0') { + serial_printf(c); + if (c == '\n') { + serial_printf('\r'); + } + } +} + +/* + * nothing to do + */ +#define arch_decomp_setup() + +#define arch_decomp_wdog() diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/vmalloc.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/vmalloc.h diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/vmalloc.h linux-2.4.19-rmk2/include/asm-arm/arch-psionw/vmalloc.h --- /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/arch-psionw/vmalloc.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.19-rmk2/include/asm-arm/arch-psionw/vmalloc.h 2002-10-02 22:07:30.000000000 -0700 @@ -0,0 +1,33 @@ +/* + * linux/include/asm-arm/arch-psionw/vmalloc.h + * + * Copyright (C) 2000 Deep Blue Solutions Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +/* + * Just any arbitrary offset to the start of the vmalloc VM area: the + * current 8MB value just means that there will be a 8MB "hole" after the + * physical memory until the kernel virtual memory starts. That means that + * any out-of-bounds memory accesses will hopefully be caught. + * The vmalloc() routines leaves a hole of 4kB between each vmalloced + * area for the same reason. ;) + */ +#define VMALLOC_OFFSET (8*1024*1024) +#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & \ + ~(VMALLOC_OFFSET-1)) +#define VMALLOC_VMADDR(x) ((unsigned long)(x)) +#define VMALLOC_END (PAGE_OFFSET + 0x1c000000) diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/hardware/psionw.h linux-2.4.19-rmk2/include/asm-arm/hardware/psionw.h diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/hardware/psionw.h linux-2.4.19-rmk2/include/asm-arm/hardware/psionw.h --- /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/asm-arm/hardware/psionw.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.4.19-rmk2/include/asm-arm/hardware/psionw.h 2002-10-06 14:29:10.000000000 -0700 @@ -0,0 +1,402 @@ +/* + * linux/include/asm-arm/hardware/psionw.h + * + * This file contains the hardware definitions of the PSIONW internal + * registers. + * + * Copyright (C) 2001 Tony Lindgren + * Copyright (C) 2001 Yuji Shinokawa + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * ************************ NOTE FOR DEVELOPERS *************************** + * + * Please see also the "Windermere Software Interface Specification" + * PDF file. (Series_5mx_specs.pdf) + * + * This file is not publicly available, but is available for Linux + * developers without a NDA. Thank you Psion! + * + * Please contact the PsiLinux mailing list at: + * + * linux-7110-psion@lists.sourceforge.net + * + * to get a copy of this file. + * + * ************************************************************************ + */ + +#ifndef __ASM_HARDWARE_PSIONW_H +#define __ASM_HARDWARE_PSIONW_H + +#define PSIONW_PHYS_BASE (0x80000000) + +#ifndef __ASSEMBLY__ +#define psionw_readb(off) __raw_readb(PSIONW_BASE + (off)) +#define psionw_readl(off) __raw_readl(PSIONW_BASE + (off)) +#define psionw_writeb(val,off) __raw_writeb(val, PSIONW_BASE + (off)) +#define psionw_writel(val,off) __raw_writel(val, PSIONW_BASE + (off)) +#endif + +/* + * LCD Controller + */ + +#define PSION_HSW (0x02 << 10) /* Horiz sync pulse width */ +#define PSION_HFP (0x01 << 16) /* Horiz front porch */ +#define PSION_HBP (0x01 << 24) /* Horiz back porch */ + +#define PSION_VSW (0x02 << 10) /* Vert sync pulse width */ +#define PSION_VFP (0x01 << 16) /* Vert front porch */ +#define PSION_VBP (0x01 << 24) /* Vert back porch */ + +#if defined(CONFIG_PSIONW_REVO) || defined(CONFIG_PSIONW_REVOPLUS) +#define PSION_LCD_W 480 /* LCD width */ +#define PSION_LCD_H 160 /* LCD heigth */ +#define PSION_ACB (0xc << 8) /* AC-bias frequency */ +#else +#define PSION_LCD_W 640 /* LCD width */ +#define PSION_LCD_H 240 /* LCD height */ +#define PSION_ACB (0xb << 8) /* AC-bias frequency */ +#endif + +#define PSION_LCD_OFF 0xd000 /* LCD memory start offset */ +#define LCD_PAL_SIZE (0x20) /* LCD palette size */ +#define LCD_BUF_SIZE (PSION_LCD_W*PSION_LCD_H*4/8) /* LCD buffer size */ +#define LCD_MEM_SIZE (LCD_PAL_SIZE + LCD_BUF_SIZE) /* LCD memory size */ +#define LCD_MEM_START PAGE_OFFSET + PSION_LCD_OFF /* LCD memory start offset */ +#define LCD_PAL_START LCD_MEM_START /* LCD palette start offset */ +#define LCD_BUF_START LCD_PAL_START + LCD_PAL_SIZE /* LCD buffer start offset */ + +#define LCDCTL (0x0200) +#define LCDCTL_EN (1 << 0) +#define LCDCTL_BW (1 << 1) +#define LCDCTL_DP (1 << 2) +#define LCDCTL_DONE (1 << 3) +#define LCDCTL_NEXT (1 << 4) +#define LCDCTL_ERR (1 << 5) +#define LCDCTL_TFT (1 << 7) +#define LCDCTL_M8B (1 << 8) + +#define LCDST (0x0204) +#define LCDST_NEXT (1 << 1) +#define LCDST_BER (1 << 2) +#define LCDST_ABC (1 << 3) +#define LCDST_FUF (1 << 5) + +#define LCD_DBAR1 (0x0210) + +#define LCDT0 (0x0220) +#define LCDT1 (0x0224) +#define LCDT2 (0x0228) +#define LCDT2_IVS (1 << 20) +#define LCDT2_IHS (1 << 21) +#define LCDT2_IPC (1 << 22) +#define LCDT2_IEO (1 << 23) + +#define LCD_DEF_CMASK (0x10) /* Default value for the LCD contrast */ + +/* + * ETNA PCMCIA Controller + */ +#if defined(CONFIG_PSIONW_5MXPRO24MB) || defined(CONFIG_PSIONW_5MXPRO32MB) +#define ETNA_P_BASE 0x50000000 /* ETNA controller physical base */ +#else +#define ETNA_P_BASE 0x20000000 /* ETNA controller physical base */ +#endif + +#define ETNA_V_BASE 0xde000000 /* ETNA controller virtual base */ +#define ETNA_SIZE 0x00100000 /* ETNA controller size */ + +#define ETNA_UNKNOWN_0 0x0 /* Seems to be always 0x0f */ +#define ETNA_UNKNONW_1 0x1 /* Seems to be always 0x00 */ +#define ETNA_UNKNOWN_2 0x2 /* Seems to be always 0x02 */ +#define ETNA_UNKNOWN_3 0x3 /* Seems to be always 0x00 */ +#define ETNA_UNKNOWN_4 0x4 /* Seems to be always 0x00 */ +#define ETNA_UNKNOWN_5 0x5 /* Seems to be always 0x00 */ +#define ETNA_INT_STATUS 0x6 /* ETNA interrupt Status */ +#define ETNA_INT_MASK 0x7 /* ETNA interrupt Mask */ +#define ETNA_INT_CLEAR 0x8 /* ETNA interrupt Clear */ +#define ETNA_SKT_STATUS 0x9 /* Socket status ??? */ +#define ETNA_SKT_CFG 0xa /* Socket config ??? */ +#define ETNA_SKT_CTRL 0xb /* Enable socket ??? */ +#define ETNA_WAKE_1 0xc /* Socket wake up; Usually 0x88, goes to 0x00 after STBY */ +#define ETNA_SKT_ACTIVE 0xd /* Socket active ??? */ +#define ETNA_UNKNOWN_E 0xe /* Seems to be always 0x00 */ +#define ETNA_WAKE_2 0xf /* Socket wake up; Usually 0x10, goes to 0x00 after STBY */ + +#define SKT_BUSY (1 << 0) /* ETNA socket busy */ +#define SKT_NOT_READY (1 << 1) /* ETNA socket not ready */ +#define SKT_CARD_OUT (1 << 2) /* ETNA card out */ + +#define ETNA_CARD_INT (1 << 0) /* ETNA card interrupt */ +#define ETNA_BUSY_INT (1 << 2) /* ETNA socket interrupt */ +#define ETNA_SOCK_INT1 (1 << 4) +#define ETNA_SOCK_INT2 (1 << 5) + +#define CARD_INT_MASK 0x05 /* Normal card interrupt = ETNA_CARD_INT | ETNA_BUSY_INT */ +#define ETNA_CLEAR_MASK 0xff /* Clear ETNA interrupt */ +#define ETNA_CF_IRQ 0x01 /* Enable ETNA Interrupt */ + +#if defined(CONFIG_PSIONW_5MXPRO24MB) || defined(CONFIG_PSIONW_5MXPRO32MB) +#define CF1_P_BASE 0x30000000 /* PCMCIA physical base */ +#else +#define CF1_P_BASE 0x40000000 /* PCMCIA physical base */ +#endif + +#define CF1_V_BASE 0xe0000000 /* PCMCIA virtual base */ +#define CF_SIZE 0x10000000 /* 4 areas of 64MB each */ +#define CF_ATTR_BASE 0x00000000 /* This is needed, or it won't work!!! */ +#define CF_MEM_BASE 0x04000000 /* Address bit 26 set */ +#define CF_IO8_BASE 0x08000000 /* Address bit 27 set */ +#define CF_IO16_BASE 0x0c000000 /* Address bits 26 & 27 set */ + +#define CF_CFG_REG 0x003c +#define CF_CFG_VAL 0x00730069 /* Epoc value from e 0x5801603c in ArLo */ +#define CF_CUR_CFG 0x200 + +/* + * Boot EEPROM used by Epoc (Verified on 5mx Pro 32MB only) + */ +#define PSION_P_BR 0x00000000 +#define PSION_V_BR 0xde200000 +#define PSION_BR_SIZE (1024*128) + +/* + * Boot Flash used by Epoc, not used in 5mx Pro (Not verified on 5mx) + */ +#define PSION_P_BF 0x10000000 +#define PSION_V_BF 0xde300000 +#define PSION_BF_SIZE (1024*1024*2) + +/* + * GPIO/KBD Registers + */ +#define PADR (0x0e00) +#define PBDR (0x0e04) +#define PCDR (0x0e08) +#define PDDR (0x0e0c) +#define PADDR (0x0e10) +#define PBDDR (0x0e14) +#define PCDDR (0x0e18) +#define PDDDR (0x0e1c) +#define PEDR (0x0e20) +#define PEDDR (0x0e24) +#define KSCAN (0x0e28) +#define LCDMUX (0x0e2c) + +/* + * Port A, Keyboard + */ +#define PADR_0 (1 << 0) +#define PADR_1 (1 << 1) +#define PADR_2 (1 << 2) +#define PADR_3 (1 << 3) +#define PADR_4 (1 << 4) +#define PADR_5 (1 << 5) +#define PADR_6 (1 << 6) +#define PADR_7 (1 << 7) + +/* + * Port B, Data copied from Psion 5 code + * + * +--7--+--6--+--5--+--4--+--3--+--2--+--1--+--0--+ + * |VPCEN|OPEN |VLDD3|VLDD2|VLDD1|VLDD0|EECLK|EECS | + * | out |in/ou|in/ou|in/ou|in/ou|in/ou| out | out | + * +-----+-----+-----+-----+-----+-----+-----+-----+ + */ +#define PBDR_EECS (1 << 0) /* Ext clock?, NOT TESTED */ +#define PBDR_EECLK (1 << 1) /* Ext clock?, NOT TESTED */ +#define PBDR_VLDD0 (1 << 2) /* LCD contrast reg0 */ +#define PBDR_VLDD1 (1 << 3) /* LCD contrast reg1 */ +#define PBDR_VLDD2 (1 << 4) /* LCD contrast reg2 */ +#define PBDR_VLDD3 (1 << 5) /* LCD contrast reg3 */ +#define PBDR_OPEN (1 << 6) /* Case open/closed */ +#define PBDR_VPCEN (1 << 7) /* ETNA CF power disabled */ + +#define PBDR_VLD_MASK 0x3c /* LCD contrast mask */ +#define PBDR_VLD_SHIFT 2 /* LCD contrast shift */ + + +/* + * Port C, Data copied from Psion 5 code + * + * +--7--+--6--+--5--+--4--+--3--+--2--+--1--+--0--+ + * |ADICT|BBLD |UART1|LIGHT|UART2|PLED | DTR | RTS | + * | out | out | out | out | out | out | out | out | + * +-----+-----+-----+-----+-----+-----+-----+-----+ + */ +#define PCDR_RTS (1 << 0) /* RS-232 RTS, NOT TESTED */ +#define PCDR_DTR (1 << 1) /* RS-232 DTR toggle, NOT TESTED */ +#define PCDR_PLED (1 << 2) /* Disable power LED, NOT TESTED */ +#define PCDR_UART2 (1 << 3) /* Enable UART1 */ +#define PCDR_LIGHT (1 << 4) /* LCD backlight */ +#define PCDR_UART1 (1 << 5) /* Enable UART0 */ +#define PCDR_ADICT (1 << 6) /* Set audio to dictaphone */ + +/* + * Port D, Data copied from Psion 5 code + * + * +--7--+--6--+--5--+--4--+--3--+--2--+--1--+--0--+ + * | X2 |LCDLR|TRIX2|SLED |DORSW| LCD |AMPEN|CDEN | + * |in/ou| out | n/a | out | out | out | out | out | + * +-----+-----+-----+-----+-----+-----+-----+-----+ + */ +#define PDDR_CDE (1 << 0) /* Codec enable, NOT TESTED */ +#define PDDR_AMPEN (1 << 1) /* Audio amp enable, NOT TESTED */ +#define PDDR_LCD_PWR (1 << 2) /* LCD power */ +#define PDDR_ETNA_DOOR (1 << 3) /* ETNA door switch power, NOT TESTED */ +#define PDDR_SLED (1 << 4) /* Front status LED on */ +#define PDDR_PUMP_PWR2 (1 << 5) /* ETNA and LCD need this */ +#define PDDR_PUMP_PWR1 (1 << 6) /* DC to DC converter power */ +#define PDDR_ETNA_ERR (1 << 7) /* ETNA access error */ + +/* + * Port E, Data copied from Psion 5 code + * + * +--3--+--2--+--1--+--0--+ + * |Y1EN |X1EN |Y2EN |X2EN | + * | out | out | out | out | + * +-----+-----+-----+-----+ + */ +#define PEDR_X2EN (1 << 0) /* Digitiser X2 drive, NOT TESTED */ +#define PEDR_Y2EN (1 << 1) /* Digitiser Y2 drive, NOT TESTED */ +#define PEDR_X1EN (1 << 2) /* Digitiser X1 drive, NOT TESTED */ +#define PEDR_Y1EN (1 << 3) /* Digitiser Y1 drive, NOT TESTED */ + +#define MEMCFG1 (0x0000) /* Memory configuration */ +#define MEMCFG2 (0x0004) /* Memory configuration */ +#define DRAM_CFG (0x0100) /* DRAM control register */ + +/* + * State and Power Controller + */ +#define PWRSR (0x0400) /* Power control state */ +#define PWRCNT (0x0404) /* Clock/debug control status */ +#define HALT (0x0408) /* Enter idle mode */ +#define STBY (0x040c) /* Enter standby mode */ + +#define BLEOI (0x0410) /* Clear battery low interrupt, write only */ +#define MCEOI (0x0414) /* Clear media changed interrupt, write only */ +#define TEOI (0x0418) /* Clear tick interrupt, write only */ +#define STFCLR (0x041c) /* Clear NBFLG, RSTFLG, PFFLG, CLDFLG, write only */ +#define E2EOI (0x0420) /* Clear NEINT2, write only */ + +#define TC1EOI (0x0c0c) /* Clear timer 1 interrupt, write only */ +#define TC2EOI (0x0c2c) /* Clear timer 2 interrupt, write only */ +#define RTCEOI (0x0d10) /* Clear RTC interrupt, write only */ +#define UMSEOI (0x0714) /* Clear UART 2 modem status interrupt, write only */ + +/* + * PWRSR Flags + */ +#define RTCDIV (1 << 0) /* 6 bits, 64Hz ticks since the increment of RTC, 32 counts ahead of RTC */ +#define MCDR (1 << 6) /* Media changed direct read */ +#define DCDET (1 << 7) /* Power from the mains adapter */ +#define WUDR (1 << 8) /* Wake up direct read */ +#define WUON (1 << 9) /* Wake up out of stanby, clear at HALT STDBY or STFCLR */ +#define NBFLG (1 << 10) /* New battery flag, clear at STFCLR */ +#define RSTFLG (1 << 11) /* Reset flag, clear at STFCLR */ +#define PFFLG (1 << 12) /* Power fail flag, clear at STFCLR */ +#define CLDFLG (1 << 13) /* Cold start flag, clear at STFCLR */ +#define VERID (1 << 14) /* Windermere version id, two bits, 0 for first version */ + +/* + * PWRCNT Flags + */ +#define EXCKEN (1 << 0) /* External expansion clock enable, 1=on, 0=on only for bit 7 memcfg */ +#define WAKEDIR (1 << 1) /* Disable waking up from STANDBY mode via the wakeup input */ +#define CLKFLG (1 << 2) /* Clock speed, 1=36MHz, 0=18MHz */ +#define ADCCLK (1 << 3) /* 8 bit to set the clock divider for ADCCLK output clock */ + +/* + * Interrupts + */ +#define INTSR (0x0500) /* Interrupt status after masking, read-only */ +#define INTRSR (0x0504) /* Interrupt status before masking, read-only */ +#define INTENS (0x0508) /* Interrupt enable, read-write */ +#define INTENC (0x050c) /* Interrupt disable, write-only */ +#define INTTEST1 (0x0514) /* Interrupt test register */ +#define INTTEST2 (0x0518) /* Interrupt test register */ + +#define INT_EXTFIQ (1 << 0) +#define INT_BLINT (1 << 1) +#define INT_WEINT (1 << 2) +#define INT_MCINT (1 << 3) +#define INT_CSINT (1 << 4) +#define INT_EINT1 (1 << 5) /* PCMCIA/external interrupt 1 */ +#define INT_EINT2 (1 << 6) +#define INT_EINT3 (1 << 7) +#define INT_TC1OI (1 << 8) +#define INT_TC2OI (1 << 9) +#define INT_RTCMI (1 << 10) +#define INT_TINT (1 << 11) +#define INT_UART1 (1 << 12) +#define INT_UART2 (1 << 13) +#define INT_LCDINT (1 << 14) +#define INT_SSEOTI (1 << 15) + +/* + * Clock + */ +#define RTCTIME ((psionw_readl(RTCDRU) << 16) | (psionw_readl(RTCDRL) & 0xffff)) + +#define TC1LOAD (0x0c00) +#define TC1VAL (0x0c04) +#define TC1CTRL (0x0c08) + +#define TC2LOAD (0x0c20) +#define TC2VAL (0x0c24) +#define TC2CTRL (0x0c28) +#define TC_BIT2 (1 << 2) +#define TC_CLKSEL (1 << 3) +#define TC_BIT4 (1 << 4) +#define TC_BIT5 (1 << 5) +#define TC_MODE (1 << 6) +#define TC_ENABLE (1 << 7) +#define BZCONT (0x0c40) +#define BZ_BZTOG (1 << 0) +#define BZ_BZMOD (1 << 1) + +#define RTCDRL (0x0d00) /* RTC data register low */ +#define RTCDRU (0x0d04) /* RTC data register high */ +#define RTCMRL (0x0d08) /* RTC match register low */ +#define RTCMRU (0x0d0c) /* RTC match register high */ + +/* + * SSI - Synchronous Serial Interface + */ +#define SSCR0 (0x0b00) /* Serial control register 0 */ +#define SSCR1 (0x0b04) /* Serial control register 1 */ +#define SSDR (0x0b0c) /* Data register */ +#define SSSR (0x0b14) /* Status register */ + +/* + * DC to DC Converter + */ +#define PUMPCON (0x0900) +#define PUMP_RUN_VAL (0xbbb) +#define PUMP_STOP_VAL (0x0) + +/* + * Codec + */ +#define CODR (0x0a00) /* Codec data register */ +#define CONFG (0x0a04) /* Codec config register */ +#define COLFG (0x0a08) /* Codec flag register */ +#define COEOI (0x0a0c) /* Codec end of interrupt, write only */ +#define COTEST (0x0a10) /* Codec test register */ + +#endif /* __ASM_HARDWARE_PSIONW_H */ \ diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/linux/miscdevice.h linux-2.4.19-rmk2/include/linux/miscdevice.h diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/linux/miscdevice.h linux-2.4.19-rmk2/include/linux/miscdevice.h --- /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/linux/miscdevice.h 2002-10-02 22:05:12.000000000 -0700 +++ linux-2.4.19-rmk2/include/linux/miscdevice.h 2002-10-06 14:29:17.000000000 -0700 @@ -13,6 +13,7 @@ #define APOLLO_MOUSE_MINOR 7 #define PC110PAD_MINOR 9 #define ADB_MOUSE_MINOR 10 +#define PS5MX_TPANEL_MINOR 11 /* Psion 5mx touch screen */ #define MK712_MINOR 15 /* MK712 touch screen */ #define WATCHDOG_MINOR 130 /* Watchdog timer */ #define TEMP_MINOR 131 /* Temperature Sensor */ diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/linux/serial_core.h linux-2.4.19-rmk2/include/linux/serial_core.h diff -urN -X /home/arm/dontdiff_tml_arm /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/linux/serial_core.h linux-2.4.19-rmk2/include/linux/serial_core.h --- /home/download/kernels/linux-2.4.19-rmk2-vanilla/include/linux/serial_core.h 2002-10-02 22:05:12.000000000 -0700 +++ linux-2.4.19-rmk2/include/linux/serial_core.h 2002-10-06 14:29:34.000000000 -0700 @@ -47,6 +47,7 @@ #define PORT_CLPS711X 33 #define PORT_SA1100 34 #define PORT_UART00 35 +#define PORT_PSIONW 36 #define PORT_21285 37 #ifdef __KERNEL__